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Infineon /XMC4800 /ECAT0 /DC_LATCH0_TIME_NEG[1]

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Interpret as DC_LATCH0_TIME_NEG[1]

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DC_LATCH0_TIME_NEG

Description

Register captures System time at the negative edge of the Latch0 signal

Fields

DC_LATCH0_TIME_NEG

Captures System time at the negative edge of the Latch0 signal

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data